Intel Sandy Bridge. Microarchitecture
Intel Sandy Bridge microarchitecture overview
Graphics core, L3-cache
Like Processor core, Graphics core of Sandy Bridge processors is also produced using 32nm process logic and supports DirectX 10 API (yes — DX10, Intel’s integrated graphics is not ready for DX11 yet). Graphics core clock is independent and can change in reference with load applied. Moreover, its has Turbo boost technology too (inherited from processor cores)— voltage is not fixed and changes depending on load. Power control unit distributes the power among processor cores and graphics core subject to priorities. If power control unit shares power between processor and graphics cores, then the Ring shares the power between them and LLC. LLC can be accessed independently, therefore, processor and graphics core can use/access LLC ad libitum considering coherency domains:
Domain sizes are dynamic, one can set the size for graphics domain trough VGA driver.The following question arises — can’t we do it easier without LLC and what does graphics core have to do with it? The answer is simple — unlike discrete cards, iterated graphics solution does not have its own memory, thereby instead of using memory, it uses LLC now and final result is sent to output devices straight from cache. This way you get increased throughput of graphics inside processor and, of course, high energy efficiency that we mentioned in every paragraph of our overview. All left is give details of graphics core. To begin with, the graphics domain is programmable (like a small Fermi). Graphics core architecture arrangement is different from what we see in AMD and NVIDIA graphic solutions:
Instead of shaders Intel uses Execution Unit (EU). Depending on particular processor model the number of EU can be either 6 or 12. The main watchword of Intel’s graphics architecture is parallel computing. Intel also promises to have doubled per EU performance compared to its solutions of previous generation (HD Graphics). In addition, other improvements include acceleration unit to work with codecs and supporting modern standards:
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